UProducts > Neotion Processor 4 Plus
 
 
 



  NP4 Series
● 
NP4
● 
NP4+
● 
NP4 HD
   
  NP5 Series
● 
NP5
● 
NP5 HD
   
Others
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N-HUB
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N-Chip
   
 
The NEOTION Processor 4+ [NP4+] is a silicium of fully optimized low cost single chip.



This processor enables:

  • MPEG-4 AVC SD (NP4 & NP4+) or HD (NP4 HD),
  • MPEG-4 AVC SD (NP4 & NP4+) or HD (NP4HD) to MPEG-2 high speed transcoding,
  • IP-TV & PC connectivity,
  • Unrivalled security features
The NEOTION Processors 4 are available through patented module (The Neotion Pockets ) and sub-systems (The Neotion Core Modules ) implementations directly compatible with the millions of Digital Satellite Receivers already unfold in the general public market. We will find the NP4 Series in various implementation types:
  • Digital TV receiver,
  • Digital Video Recorder,
  • Sub-system – The NEOTION Core Module – to be inserted into digital set-top boxes (Daughter Board separately sold to be inserted in a MPEG-2 legacy decoder with SO-DIMM interface),
  • Modules – The NEOTION Pockets dTV – to be inserted in the STB or iDTV (DTT enabled TV sets) Common Interface,
  • IP (Internet Protocol) receivers

These MPEG-4 AVC processors solutions meet legitimate expectations from the contents editors who want, either reduce their delivery costs, or increase their audience ratings or from audiences who expect to receive an increased choice in the number of channels and more and more diversity.

The NEOTION Processor 4 + conception – NP4+ has begun in January 2005 and has been launched since September 2007.

All these ASIC integrate Neotion patented security features as well as unrivalled MPEG-4 AVC applications.

 
NP4+ Features
       
  Video:
MPEG-4 AVC Video decoder –Main Profile up to Level 3.0
Real time MPEG-2 MP@ML encoder
Video Processing based on several optimized DSP
PAL and NTSC formats

CI slave interface (ISO/IEC EN5022) - Software CI stack

Host CPU:
ARM 926 @ 144MHz
16K I-cache and 16K D-cache (MMU)

Audio (optional feature -supported by software-) :
Format supported MP3, AAC, MPEG1-L2, MPEG2 Audio

 TS Processing:
DVB CSA descrambler and Proprietary descrambler
Up to 32 TS Section Filters - Transport packet filters
MUX transport packets from 2 channels into original TS

Security:
AES (256bits) HW accelerator
Secure Silicon for Application such as Pairing (anti card sharing)
On chip OTP
Copy Protection including future CI v2 Standard
DLNA Application (DTCP)

SD Card 2.0 / SD IO 1.10 Host controller 		SPI interface for serial flash
on-chip SRAM (64 Kbytes)
off-chip DDR DRAM (up to 64 Mbytes)

Ethernet MAC:
10/100 BASE-T MAC802.3 embedded - MII 802.3 bus interface
IP, UDP, RTP, RTSP, UPnP stacks



HDMI output:
On chip HDMI + HDCP MAC + Phy off chip – CEC support

Low Power Consumption and Low Temperature Dissipation
       
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